Applied Formal Verification: For Digital Circuit Design

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Applied Formal Verification: For...

Applied Formal Verification: For Digital Circuit Design

Name: Applied Formal Verification: For Digital Circuit Design
ISBN: 9780071443722

Douglas Perry, Harry Foster

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Intended for hardware design engineers, this book introduces general verification techniques, compares them with formal verification techniques, and provides instructions for creating formal high level requirement. The authors discuss formal verification concepts for both applied Boolean and sequential verification, formal property checking, the process of creating a formal test plan, and state reduction techniques. The appendices list commonly used PSL statements for high level requirements and similar requirements specified in System Verilog syntax.

श्रेणियाँ:

Engineering

साल:

2005

संस्करण:

प्रकाशन:

McGraw-Hill Professional

भाषा:

english

पृष्ठ:

259

ISBN 10: